Looking for Integrated Circuit Physical Design to work onsite in Plymouth MN and with secret level clearance.
KEY RESPONSIBILITIES
• Lead efforts to translate customer designs into ***'s ASIC technology (RTL to GDSII)
• Execute and address Floor-planning, Power grid design and deployment, achieve timing closure complying to timing constraints, harmonize DFT-insertion needs with physical design needs, configure for and pass physical verification requirements
• Execute design work fully on-site when required (e.g., Classified Designs)
• Present and participate in project phase gate reviews
• Prepare Documentation
• Mentor junior engineers
Tools We Use:
• Synopsys Design Compiler
• Synopsys PrimeTime
• Synopsys DFT Compiler
• Synopsys IC Compiler
• Synopsys TetraMAX
• Siemens Tessent MemoryBIST
• Ansys Redhawk
• Synopsys IC Validator
• Siemens Calibre
YOU MUST HAVE
• Degree in Electrical Engineering or Computer Engineering
• 5 years of ASIC Physical Design experience
• Ability and willingness to work on-site at the *** Plymouth, MN facility (zip code 55441)
• US Citizenship is required
• Dual Citizenship is not allowed due to contractual requirements
• Previously held USG Secret security clearance in good standing, or, no known barriers to achieve a USG Secret security clearance is required
WE VALUE
• 5 or more years of experience with digital IC design using Synopsys EDA tools
• Strong scripting language skills – e.g., Perl, Shell, TCL, C
• Strong technical problem-solving skills
• Windows OS and LINUX OS and Microsoft office suite tools proficiency
• Effective and clear communication skills and good ability to work with others
• Work accurately with excellent attention to detail
• Ability to work simultaneously on multiple projects and follow up on responsibilities
• Self-starter who requires minimal oversight
• Experience with Siemens Physical Verification tools and methods
• Radiation effects analysis knowledge/experience
• Advanced node and SOI CMOS technology design experience
Nesco Resource provides equal employment opportunities to all employees and applicants for employment and prohibits discrimination and harassment of any type without regard to race, color, religion, age, sex, national origin, disability status, genetics, protected veteran status, sexual orientation, gender identity or expression, or any other characteristic protected by federal, state, or local laws.
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KEY RESPONSIBILITIES
• Lead efforts to translate customer designs into ***'s ASIC technology (RTL to GDSII)
• Execute and address Floor-planning, Power grid design and deployment, achieve timing closure complying to timing constraints, harmonize DFT-insertion needs with physical design needs, configure for and pass physical verification requirements
• Execute design work fully on-site when required (e.g., Classified Designs)
• Present and participate in project phase gate reviews
• Prepare Documentation
• Mentor junior engineers
Tools We Use:
• Synopsys Design Compiler
• Synopsys PrimeTime
• Synopsys DFT Compiler
• Synopsys IC Compiler
• Synopsys TetraMAX
• Siemens Tessent MemoryBIST
• Ansys Redhawk
• Synopsys IC Validator
• Siemens Calibre
YOU MUST HAVE
• Degree in Electrical Engineering or Computer Engineering
• 5 years of ASIC Physical Design experience
• Ability and willingness to work on-site at the *** Plymouth, MN facility (zip code 55441)
• US Citizenship is required
• Dual Citizenship is not allowed due to contractual requirements
• Previously held USG Secret security clearance in good standing, or, no known barriers to achieve a USG Secret security clearance is required
WE VALUE
• 5 or more years of experience with digital IC design using Synopsys EDA tools
• Strong scripting language skills – e.g., Perl, Shell, TCL, C
• Strong technical problem-solving skills
• Windows OS and LINUX OS and Microsoft office suite tools proficiency
• Effective and clear communication skills and good ability to work with others
• Work accurately with excellent attention to detail
• Ability to work simultaneously on multiple projects and follow up on responsibilities
• Self-starter who requires minimal oversight
• Experience with Siemens Physical Verification tools and methods
• Radiation effects analysis knowledge/experience
• Advanced node and SOI CMOS technology design experience
Nesco Resource provides equal employment opportunities to all employees and applicants for employment and prohibits discrimination and harassment of any type without regard to race, color, religion, age, sex, national origin, disability status, genetics, protected veteran status, sexual orientation, gender identity or expression, or any other characteristic protected by federal, state, or local laws.