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Job Summary
We are seeking two highly experienced Senior SoC Performance Analysis Engineers to support advanced processor performance monitoring, analysis, and optimization.
The ideal candidates will have extensive experience analyzing System-on-Chip (SoC) architectures, developing performance monitoring tools, and evaluating data movement across cache hierarchies and on-chip communication networks.
This position requires strong technical expertise in bandwidth allocation, Quality of Service (QoS), memory performance, and processor architecture, particularly Intel Tiger Lake, Ice Lake, and Alder Lake platforms.
Key Responsibilities
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Design, develop, and implement tools and processes to monitor and analyze SoC performance.
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Monitor traffic utilization, throughput, and contention across L2/L3 caches and network-on-chip (NoC) communication fabrics.
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Analyze data movement between processor cores, caches, memory controllers, and other on-die components.
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Identify performance bottlenecks, resource contention, and bandwidth limitations.
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Characterize and establish performance limits for bandwidth allocation, QoS parameters, and channel priorities.
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Develop and improve performance monitoring methodologies, software applications, and supporting tools.
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Conduct detailed performance analysis of Intel Tiger Lake, Ice Lake, and Alder Lake processor architectures.
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Collaborate with engineering teams to troubleshoot complex hardware and software performance issues.
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Provide technical guidance and support to project teams.
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Coordinate engineering activities and contribute to complex technical projects.
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Recommend improvements to system performance, efficiency, and resource utilization.
Required Qualifications
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Bachelor's degree in Computer Engineering, Electrical Engineering, Computer Science, or a related technical field.
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8+ years of professional experience in software engineering, processor architecture, or a related technical discipline.
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10+ years of hands-on SoC performance analysis experience, including building tools and processes for performance monitoring.
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Experience monitoring usage, throughput, and traffic contention across L2/L3 cache and NoC communication fabrics.
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Strong understanding of cache hierarchies, memory subsystems, interconnects, and on-chip data movement.
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Demonstrated ability to characterize bandwidth allocation, QoS settings, and channel priorities.
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Experience working with Intel Tiger Lake, Ice Lake, and Alder Lake processors.
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Strong analytical, troubleshooting, and performance optimization skills.
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Ability to work independently on complex engineering challenges and provide technical leadership.
Nesco Resource provides equal employment opportunities to all employees and applicants for employment and prohibits discrimination and harassment of any type without regard to race, color, religion, age, sex, national origin, disability status, genetics, protected veteran status, sexual orientation, gender identity or expression, or any other characteristic protected by federal, state, or local laws.
