Description:
The selected candidate will be responsible for ASIC & FPGA development on R&D program. This engineer with have experience in developing, testing, and integrating digital signal processing (DSP), high speed digital design, high speed communication and system-on-chip (SOC) implemented on FPGA platforms. Experience with COTS based control platforms and embedded processors on FPGA platforms. This person will help develop more affordable ways to automate and develop scripts to improve FPGA development efforts. Cross discipline collaboration with Systems Architects, RF/Analog & Digital Circuit designers and ASIC/FPGA engineers to create leading edge products for future business growth, contributing to complex systems employing high speed networking concepts. The selected candidate will also provide support and technical direction to junior engineers. Overall contribution to design, simulation, verification, integration & test of complex, high speed products.
Required Skills:
- Experience with FPGA design tools (Xilinx Vivado, Client Quartus, Synopsys Synplify).
- Proficient in SystemVerilog
- Proficiency with HDL simulators, waveform viewers, and coverage tools.
- Familiarity with hardware in the loop (HIL) test setups and test equipment (e.g., JTAG, logic analyzers).
- Experience with version control systems and configuration management.
Desired Skills:
Proficient in UVM. Proficient in C.
Custom Fields:
Name: Specialized atlas training comments
Value: None
Name: Security Clearance
Value: None
Name: Security Clearance Comments
Value: Ability to obtain
Name: Work Schedule
Value: 4/10-1st Shift
Name: Allow Expenses
Value: No
Name: Auto Time
Value: Fieldglass
Name: Does this role require access to ECI information
Value: Yes
Name: Does this require any specialized atlas training?
Value: No
Name: Opportunity for FTE Hire
Value: Yes
Name: Safety-Sensitive
Value: No
Name: Per Diem
Value: No
Name: OT Status
Value: Exempt
Name: Worksite Classification
Value: Worker will work Onsite Full Time
Nesco Resource offers a comprehensive benefits package for our associates, which includes a MEC (Minimum Essential Coverage) plan that encompasses Medical, Vision, Dental, 401K, and EAP (Employee Assistance Program) services.
Nesco Resource provides equal employment opportunities to all employees and applicants for employment and prohibits discrimination and harassment of any type without regard to race, color, religion, age, sex, national origin, disability status, genetics, protected veteran status, sexual orientation, gender identity or expression, or any other characteristic protected by federal, state, or local laws.
FPGA Design/Verification Engineer
$60 - $80 per hour
Contract
Engineering
Owego, NY, 13827-3900
Job ID:
29373812
Requirements to Apply
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